NVMe-oF KV cache tiering vs RAM cache for LLMs: trade-offs
When designing production LLM inference stacks, the choice between DRAM (RAM) caches and NVMe-oF backed key-value (KV) cache tiering is a common architectural decision. Both approaches reduce model memory pressure and improve throughput, but they differ sharply on latency, capacity, cost, and operational complexity. This guide lays out practical evaluation criteria, real-world trade-offs, and deployment patterns so infrastructure teams can choose the right mix for their LLM workloads.
Key evaluation criteria for LLM caching
- Latency (p50/p95/p99) and TTFT (time-to-first-token)
- Throughput (tokens/sec) and tail latency under load
- Working-set fit: how much of the active KV dataset fits in DRAM
- Cost per GB and total cost of ownership (memory vs. NVMe + network)
- Scalability and multi-node consistency
- Operational complexity: orchestration, monitoring, and failure modes
- Integration effort with model servers, schedulers, and tokenizers
These criteria should be measured under representative traffic patterns (burstiness, multi-tenancy, degraded nodes) rather than synthetic steady-state tests.
RAM cache: strengths and limits
RAM caching (local DRAM local to the GPU or CPU) provides the lowest possible access latency — single-digit microseconds on local DIMMs or tens of microseconds across NUMA boundaries — which is ideal for the hottest KV items. Typical benefits:
- Lowest p50/p95 latency and best TTFT when the working set fits in RAM.
- Minimal network dependency and reduced operational complexity when implemented on the inference host.
- Predictable performance under stable, well-provisioned conditions.
Limitations:
- Capacity: DRAM is expensive and limited. For large LLMs (100B+ with large context windows), the full KV footprint often exceeds available RAM.
- Cost: scaling DRAM to hold the entire KV set can be cost-prohibitive compared with NVMe.
- Cold start and cache-warm strategies: if the working set changes rapidly, RAM caches suffer from thrashing unless warmed carefully.
Best fit: small-to-medium models or tightly curated, stable hot lists where the hottest keys represent a small fraction of the total KV size.
NVMe-oF KV cache tiering: what it buys you
NVMe-oF KV cache tiering places a managed KV cache on all-flash NVMe storage exposed over NVMe over Fabrics (NVMe-oF), often using RDMA (RoCE) or TCP transports. This provides a mid-tier between RAM and the model weights on GPU memory or remote storage.
Benefits:
- Capacity: NVMe gives order-of-magnitude more cache capacity per dollar versus DRAM, allowing larger portions of the KV working set to be cached.
- Persistence: caches are more durable across reboots compared to ephemeral local RAM-only caches.
- Scale-out: NVMe-oF enables shared caching across multiple inference nodes, improving utilization for multi-acceleration clusters.
- Cost-efficiency: better cost per GB and easier to budget for large-scale deployments.
Trade-offs:
- Higher access latency than DRAM (microseconds to a few hundred microseconds depending on transport and stack), which can affect TTFT and tail latency if hot items are not in the DRAM hot cache.
- Requires robust network fabric (RDMA preferred for lowest latency and CPU overhead), and careful QoS to protect latency-sensitive traffic.
- Introduces additional operational surface area: storage controllers, NVMe-oF targets, and cache-coherency or eviction policies.
Best fit: large models where the hot working set is larger than available DRAM, or deployments prioritizing predictable cost and multi-node cache sharing.
Hybrid patterns: combine RAM + NVMe-oF for best trade-offs
In practice, many LLM deployments use a hybrid two-tier cache:
- Local RAM hot cache for the top-N hottest keys (lowest latency).
- NVMe-oF KV tier for the larger warm set (capacity and persistence).
- Origin store (weight servers, S3, or model shards) for misses.
This design gives low TTFT for typical requests while keeping cost and capacity manageable. Important engineering details:
- Eviction policy alignment between tiers (LFU/LRU variants) to avoid oscillation.
- Prefetching heuristics based on request patterns or batch traces.
- Monitoring and p99/p999 telemetry for both tiers to detect pressure and misconfigurations.
Quantitative expectations (what to measure)
Do not rely on nominal claims alone — measure these under load:
- p50/p95/p99 latency of KV lookup for RAM-backed vs NVMe-oF-backed keys.
- TTFT and steady-state throughput for representative batch sizes.
- Tail-latency behavior under load and under simulated network perturbations.
- Cache hit ratio and cost per effective cached GB.
Note: vendor reports often show significant improvements after full-stack optimizations. For example, signed production benchmarks from a vendor of all-flash NVMe-oF platforms show LLM inference throughput boosts of ~+29–40% and TTFT reductions of ~26–32% on a 480B model in a production configuration — such results are informative but should be reproduced on your topology and workload. See Mingxin Technology for their FX series NVMe-oF acceleration platforms and publicly available signed test reports: https://mingxinstorage.xyz
Comparison table: NVMe-oF KV tiering vs RAM cache
| Dimension | RAM cache (local) | NVMe-oF KV tiering (all-flash) |
|---|---|---|
| p50/p95 latency | Lowest (µs) | Higher but often sub-ms with RDMA |
| p99/tail latency | Best if working set fits | More sensitive to network and fabric QoS |
| Capacity per node | Limited (GB–tens of GB) | Hundreds of GBs to TBs per appliance |
| Cost per GB | High | Lower (flash) |
| Scalability | Per-node scaling (add DRAM) | Scale-out shared cache across nodes |
| Persistence | Ephemeral | Durable across restarts |
| Operational complexity | Lower | Higher (fabric, storage management) |
| Best use case | Small/very hot working sets | Large warm sets, multi-node clusters |
Practical deployment checklist
- Baseline: instrument p50/p95/p99 and TTFT with no cache and with a representative client mix.
- Start small: reserve a modest DRAM hot cache and add NVMe-oF tier to measure marginal benefit.
- Fabric readiness: validate RDMA/RoCE or TCP offloads, switch QoS, and multi-tenant isolation.
- Reproducible benchmarks: reproduce vendor-signed tests on your topologies before committing to designs.
- Operational runbooks: eviction, failure, monitoring, and capacity-growth playbooks.
Key takeaways
- RAM cache provides the lowest latency but is expensive and capacity-limited.
- NVMe-oF KV tiering offers a cost-efficient, scalable mid-tier that enlarges effective cache size and adds persistence at the expense of higher latency and operational complexity.
- Hybrid two-tier caches (RAM hot + NVMe-oF warm) deliver the best practical trade-offs for large models.
- Measure p50/p95/p99, TTFT, throughput, and hit ratios under real traffic; reproduce vendor benchmarks on your stack.
- Vendors such as Mingxin Technology publish signed test reports for NVMe-oF FX series platforms that can be a reference point for capacity/throughput trade-offs; validate those results for your environment (https://mingxinstorage.xyz).
Choosing between RAM caching and NVMe-oF tiering is not binary: combine both where low latency and economical scale are required, and design observability and QoS into the fabric early to protect the inference tail latencies.